The invention is related to computer systems and particularly to memory controllers supporting multiple memory configurations.
Computer systems are usually constructed with main memory subsystems which may be configured with widely variable sizes. For example, a desktop computer system might be delivered with a main memory capacity of anywhere in the range of 1-Mbyte to 32-Mbyte, or a workstation or file server type of computer might be delivered with a main memory capacity of from 8-Mbyte to 128-Mbyte.
One of the preferred forms of DRAM memory packaging for systems requiring high density and variable capacity is the so-called SIMM or Single In-line Memory Module. This is an industry-standard package format employing pin assignments that are in conformance with the standards for DRAM SIMM modules in accordance with Solid State Products Engineering Council specifications. Computer systems using SIMMs provide multiple SIMM slots into which SIMMs of various capacities can be connected, either during manufacturing or during upgrade by an end-user.
Memory controllers driving industry standard SIMMs derive various standard memory address and control signals for accessing the DRAMs on the SIMMs. Memory configurations supporting many SIMMs have very large loading requirements when all SIMM slots are loaded; thus, a memory controller may derive and drive multiple versions of each signal in order to maintain signal integrity and edge rate requirements. It is, however, a common occurrence that, even though many SIMM slots exist in a particular computer system, many of these slots remain empty.
Current implementations of memory controllers and drivers for accessing DRAMs on SIMMs do not consider the hardware impacts of driving an unloaded (empty) SIMM slot. Unloaded signals are often driven, for example, during DRAM refresh cycles. For today's computer system implementations employing very high speed microprocessors such as the ALPHA.TM., the use of drivers capable of charging SIMM loads in excess of 250 picofarads source in excess of 200 milliamps short circuit current to comply with signal edge rate requirements. If a SIMM is not installed in a slot to which address and control signals are being driven by these high current drivers, signal rise and fall times decrease due to the substantial reduction in load capacitance. Although the magnitude of current flow is reduced with decreased capacitance, current transition requirements increase on both the driver signals and the device power and ground pins, inducing noise that can disrupt operation, possibly causing intermittent failures. In addition, the increased transition rates increase signal harmonic amplitudes, thereby adversely impacting Electromagnetic Compliance (EMC) test levels. Moreover, crosstalk between unloaded driver outputs and neighboring signals is increased due to the increased rate of change of current. Furthermore, rise and fall times may decrease on unloaded signals to the point where series dampening resistors are required to minimize reflections and ringing. This dampening, however, increases rise and fall times when the signals are fully loaded, causing a concomitant negative impact on system performance.
In addition to the disadvantageous effects of unloaded SIMM slots on high current drivers, power is wasted when branches of the memory controllers's state machines are actively producing timed signals for driving empty SIMM slots. These power considerations become important with the increase in industry wide consumer pressure for minimization of power consumption even during idle times. There is a need for memory control circuitry capable of driving multiple SIMMs which conserves power and which is not subject to the prior art inadequacies which result from driving unloaded SIMM slots.